The present invention relates to a half-bridge arrangement for a converter, comprising two switching elements, a capacitor device and a circuit board to which the switching elements and the capacitor device are interconnected to form a half bridge. The present invention also relates to a converter having such a half-bridge arrangement.
The following discussion of related art is provided to assist the reader in understanding the advantages of the Invention, and is not to be construed as an admission that this related art is prior art to this invention.
A half bridge is a basic building block in power electronics. It is used, for example, in most step-up converter, step-down converter and current and voltage transformer topologies. FIG. 1 shows a circuit diagram of a half-bridge arrangement with drive circuitry according to the prior art. The half-bridge arrangement comprises two switching elements T1 and T2 which can both be implemented as a MOSFET with parallel freewheel diode. The two switching elements are Interconnected at a node 1 at which the output voltage (generally an AC voltage) is usually present. In this example, the source S of the first switching element T1 is connected to the drain D of the second switching element T2 via the node 1. The drain D of the first switching element T1 is usually at the positive DC voltage potential DC+ and is connected to one terminal of a DC-link capacitor C1. Likewise in the example, the source S of the second switching element T2 is at a negative DC voltage potential DC− and is connected to the other terminal of the DC-link capacitor C1.
The gate G of the first switching element T1 is connected to the output of the first driver TR1. Connected to the supply terminals of the first driver TR1 is a capacitor C2 which provides a first supply voltage Vcc1. The first driver TR1 derives its reference potential from the source S of T1.
The second switching element T2 and a second driver TR2 are in a similar configuration. The output of this driver is connected to the gate G of the transistor of the second switching element T2. The supply terminals of the driver TR2 are connected to a capacitor C3 which provides a supply voltage Vcc2. The reference potential for the second driver TR2 is again the source S of the second switching element T2.
An important factor for the switching performance of the half bridge is the parasitic Inductance in the commutation circuit. The commutation circuit is the circuit in which the current changes during a switching operation. This commutation circuit KK is shown in FIG. 1 and passes through the switching elements T1, T2 and C1. Parasitic inductances are also produced by a first drive circuit AK1 at the first driver TR1 and a second drive circuit AK2 at the second driver TR2. The respective drive circuits AK1 and AK2 pass via the source S and gate G to the outputs of the respective drivers TR1 and TR2, via the respective supply terminal to the respective capacitors C2 and C3 and back to the source S.
In power electronics there is a trend toward higher switching frequencies. As a result, passive components (inductors and capacitors) may be made smaller in many circuits. However, this causes higher switching losses in the components (especially in the case of “hard” switching when the current or voltage are non-zero), as more switching operations take place as the frequency increases. The switching losses are proportional to the switching current, the switching voltage and the switching time. For the same requirement placed on the system (current and voltage are fixed), these can be reduced by faster switching edges. The faster rise or fall times of current and voltage cause overvoltages and put an additional load on the interference immunity in the circuit. The largest effect is produced here by the leakage or parasitic inductances in the commutation circuit KK and in the drive circuits AK1 and AK2 as shown in FIG. 1.
Particularly at higher powers (higher currents), so-called high-copper circuit boards are used in which the thickness of the copper layer is significantly increased compared to normal types. There, because of the large copper cross-sections and the usual ramps at the board edges, the distances between the components and therefore the Inductances of the current paths are greater. This gives rise to conflicting objectives in the case of high powers and high frequencies.
In addition, switching and on-state power losses in the form of heat are engendered in the power semiconductors. This heat has to be dissipated in order to cool the semiconductors and therefore to be able to use them more intensively.
The problems mentioned are minimized in different approaches. However, each problem is mainly approached individually, resulting in conflicts. For example, so-called modules as shown in FIGS. 2 and 3 are used for heat dissipation. There, the power semiconductors, i.e. switching elements T1 and T2, are mounted on a DCB substrate 2 (Direct Copper Bonding). The DCB substrate 2 is mostly fixed to an aluminum base plate 3. A heat sink 4 is disposed on the opposite side of the aluminum base plate 3. The switching elements T1 and T2 are encapsulated in an insulator 5 through which interconnects 6 project. A module 7 is therefore formed by the aluminum base plate 3, the DCB substrate 2 and the insulator layer 5 with the encapsulated switching elements T1 and T2 and the interconnects 6. The module 7 is attached to a circuit board 8 on the side opposite the heat sink 4. The interconnects 6 constitute the electrical connections from the switching elements T1 and T2 to the circuit board 8. The DC-link capacitor C1 and the drivers TR1 and TR2 can be disposed on the opposite side of the circuit board 8.
In FIG. 2 it is indicated that the drive circuits AK1 and AK2 are basically created between internal interconnects 6 and the DCB substrate 2 and the circuit board 8, whereas, as shown in FIG. 3, the commutation circuit KK is created between the external interconnects 6 and the DCB substrate 2 and circuit board 8. It is not automatically possible to optimize the leakage inductances of the drive circuits AK1, AK2 and of the commutation circuit KK, as the inductances are dominated by the module 7. Because of this, these designs are generally unsuitable for higher switching frequencies.
Another approach is to design using discrete elements such as THT components (Through-Hole Technology) and SMD components (Surface Mounted Device). As in the case of module-type design, THT semiconductors offer only limited scope for low-inductance connection. Although this design also allows a connection to a heat sink to be provided, high frequencies are only rarely realized, and it will therefore not be discussed further here.
SMD circuit board design provides greater optimization potential here in respect of higher frequencies. Two frequently used designs will now be shown in connection with FIG. 4 and FIG. 5, namely one-sided and two-sided component placement. FIG. 4 shows the one-sided placement variant. Here all the components T1, T2, TR1, TR2, C1, C2 and C3 are disposed on one side of a board (not shown). The drive circuits AK1, AK2 and the commutation circuit KK are located in one plane. Maximum optimization of the leakage inductance here resides in the size of the discrete elements. For this variant, heat dissipation is difficult to achieve for the power electronics.
The two-sided placement variant as shown in FIG. 5 mainly uses the same drive circuitry as in FIG. 4 and differs primarily in that one of the three main components T1, T2 or C1 is on the back of the board 8. As can be seen from FIG. 5, the commutation circuit KK is dependent on the thickness of the board 8 (e.g. 1.6 mm). However, heat dissipation from the high-side switch T1 in particular is also difficult with this design, as most discrete power semiconductors refer their thermal pad for heat dissipation to source potential and this must be kept small for interference immunity reasons.
Any leakage inductances L can be estimated using the formulas below. This enables qualitative design improvements to be achieved. Formula [1] below relates, as shown in FIG. 6, to a conductor 9 and 10 which is in no or virtually no field of another conductor. Formula [2] relates, as shown in FIG. 7, to the case that two conductors with contrary flow directions are positioned opposite one another. The respective geometric dimensions t, w, l of the conductors 9 and 10 and, where applicable, their spacing h are marked in FIGS. 6 and 7 and used in the respective formulas [1] and [2] below.
                    L        =                  2          ×          l          ×                      [                                          ln                〚                                                      ×                                          (                                              l                                                  t                          +                          w                                                                    )                                                        +                  0.5                                ]                            ×                              nH                cm                                      〛                                              [        1        ]                                L        =                                            2              ×              h                        w                    ×          l          ×                      nH            cm                                              [        2        ]            
The effect of the commutation inductance on the losses in a half bridge can be observed in FIG. 8. This shows power loss Pv versus leakage inductance L. The power loss Pv increases constantly toward higher leakage inductances. This effect is noticeable particularly at higher frequencies and currents as the main loss component in this half bridge configuration.
It would therefore be desirable and advantageous to obviate prior art shortcomings and to provide an improved half-bridge arrangement which is less sensitive to switching events.